TDA3MV Datasheet, PDF (103/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
Table 6-1. OSC0 Crystal Electrical Characteristics (continued)
NAME
DESCRIPTION
C_f2
ESR(C_f1,C_f2)
C_f2 load capacitance for crystal parallel resonance with C_f1 = C_f2
Crystal ESR
ESR = 30 Ω
ESR = 40 Ω
19.2 MHz, 20 MHz, 27
MHz
ESR = 50 Ω
19.2 MHz, 20 MHz
27 MHz
19.2 MHz, 20 MHz
C_O
Crystal shunt capacitance
ESR = 60 Ω
27 MHz
ESR = 80 Ω
19.2 MHz, 20 MHz
27 MHz
19.2 MHz, 20 MHz
ESR = 100 Ω
27 MHz
L_M
C_M
t_j(xiosc0)
Crystal motional inductance for f_p = 20 MHz
Crystal motional capacitance
Frequency accuracy⁽¹⁾, xi_osc0
Ethernet not used
Ethernet RGMII using
derived clock
(1) Crystal characteristics should account for tolerance+stability+aging.
MIN
TYP
MAX
12
24
100
7
7
5
7
Not Supported
5
Not Supported
3
Not Supported
10.16
3.42
±200
±50
UNIT
pF
Ω
pF
pF
pF
pF
-
pF
-
pF
-
mH
fF
ppm
ppm
When selecting a crystal, the system design must take into account the temperature and aging
characteristics of a crystal versus the user environment and expected lifetime of the system.
Table 6-2 details the switching characteristics of the oscillator and the requirements of the input clock.
NAME
f_p
t_sX
Table 6-2. Oscillator Switching Characteristics—Crystal Mode
DESCRIPTION
Oscillation frequency
Start-up time
MIN
TYP
MAX
19.2, 20, 27 MHz
4
UNIT
MHz
ms
6.1.2.2 OSC0 Input Clock
A 1.8-V LVCMOS-Compatible Clock Input can be used instead of the internal oscillator to provide the
SYS_CLK1 clock input to the system. The external connections to support this are shown in Figure 6-4.
The xi_osc0 pin is connected to the 1.8-V LVCMOS-Compatible clock source. The xi_osc0 pin is left
unconnected. The vssa_osc0 pin is connected to board ground (vss).
Device
xi_osc0
xo_osc0
vssa_osc0
NC
SPRS91v_CLK_03
Figure 6-4. 1.8-V LVCMOS-Compatible Clock Input
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Clock Specifications 103