TDA3MV Datasheet, PDF (232/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
www.ti.com
8.9.2.13.1 Three DDR3 Devices
Three DDR3 devices are supported on the DDR EMIF consisting of two x16 DDR3 devices and one
device for ECC, arranged as one bank (CS). These three devices may be mounted on a single side of the
PCB, or may be mirrored in two pairs to save board space at a cost of increased routing complexity and
parts on the backside of the PCB.
8.9.2.13.1.1 CK and ADDR_CTRL Topologies, Three DDR3 Devices
Figure 8-49 shows the topology of the CK net classes and Figure 8-50 shows the topology for the
corresponding ADDR_CTRL net classes.
DDR Differential CK Input Buffers
+–
+–
+–
Processor
+
Differential Clock
Output Buffer
–
A1
A2
A3
A4
A1
A2
A3
A4
Clock Parallel
Terminator
Rcp
AT
DDR_1V5
Cac
Rcp
0.1 µF
AT
Routed as Differential Pair
Figure 8-49. CK Topology for Three DDR3 Devices
DDR Address and Control Input Buffers
SPRS91v_PCB_DDR3_06
Processor
Address and Control
Output Buffer
A1
A2
A3
A4
Address and Control
Terminator
Rtt
AT
Vtt
Figure 8-50. ADDR_CTRL Topology for Three DDR3 Devices
SPRS91v_PCB_DDR3_07
8.9.2.13.1.2 CK and ADDR_CTRL Routing, Three DDR3 Devices
Figure 8-51 shows the CK routing for three DDR3 devices placed on the same side of the PCB. Figure 8-
52 shows the corresponding ADDR_CTRL routing.
232 Applications, Implementation, and Layout
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