TDA3MV Datasheet, PDF (165/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
7.16.2 GMAC RGMII Timings
Table 7-38, Table 7-39 and Figure 7-35 present Timing Requirements for receive RGMIIn operation.
Table 7-38. Timing Requirements for rgmiin_rxc - RGMIIn Operation
NO. PARAMETER
1
t_c(RXC)
DESCRIPTION
Cycle time, rgmiin_rxc
2
t_w(RXCH)
Pulse duration, rgmiin_rxc high
3
t_w(RXCL)
Pulse duration, rgmiin_rxc low
4
t_t(RXC)
Transition time, rgmiin_rxc
SPEED
MIN
10 Mbps
360
100 Mbps
36
1000 Mbps 7.2
10 Mbps
160
100 Mbps
16
1000 Mbps 3.6
10 Mbps
160
100 Mbps
16
1000 Mbps 3.6
10 Mbps
100 Mbps
1000 Mbps
MAX
440
44
8.8
240
24
4.4
240
24
4.4
0.75
0.75
0.75
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Table 7-39. Timing Requirements for GMAC RGMIIn Input Receive for 10/100/1000 Mbps
NO. PARAMETER
DESCRIPTION
MIN
MAX
UNIT
5
t_su(RXD-RXCH)
Setup time, receive selected signals valid before rgmiin_rxc high/low
1.15
ns
6
t_h(RXCH-RXD)
Hold time, receive selected signals valid after rgmiin_rxc high/low
1.15
ns
(1) For RGMII, receive selected signals include: rgmiin_rxd[3:0] and rgmiin_rxctl.
(2) RGMII0 requires that the 4 data pins rgmii0_rxd[3:0] and rgmii0_rxctl have their board propagation delays matched within 50pS of
rgmii0_rxc.
(3) RGMII1 requires that the 4 data pins rgmii1_rxd[3:0] and rgmii1_rxctl have their board propagation delays matched within 50pS of
rgmii1_rxc.
rgmiin_rxc^(A)
rgmiin_rxd[3:0]^(B)
1
2
3
4
4
5
1st Half-byte
2nd Half-byte
6
RGRXD[3:0] RGRXD[7:4]
rgmiin_rxctl^(B)
RXDV
RXERR
SPRS91v_GMAC_08
A. rgmiin_rxc must be externally delayed relative to the data and control pins.
B. Data and control information is received using both edges of the clocks. rgmiin_rxd[3:0] carries data bits 3-0 on the
rising edge of rgmiin_rxc and data bits 7-4 on the falling edge ofrgmiin_rxc. Similarly, rgmiin_rxctl carries RXDV on
rising edge of rgmiin_rxc and RXERR on falling edge of rgmiin_rxc.
Figure 7-35. GMAC Receive Interface Timing, RGMIIn operation
Table 7-40, Table 7-41 and Figure 7-36 present Switching Characteristics for rgmiin_txctl - RGMIIn
Operation for 10/100/1000 Mbit/s
Copyright © 2016–2017, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics 165
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