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TDA3MV Datasheet, PDF (163/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0
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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
(1) H = period of baud rate, 1/programmed baud rate.
Table 7-34. Switching Characteristics Over Recommended Operating Conditions for DCAN Transmit (1)
NO. PARAMETER
DESCRIPTION
f(baud)
Maximum programmable baud rate
2 t w(DCANTX)
Pulse duration, transmit data bit (DCANx_TX)
(1) H = period of baud rate, 1/programmed baud rate.
MIN
H - 15
MAX
1
H + 15
UNIT
Mbps
ns
1
DCANx_RX
2
DCANx_TX
SPRS91v_DCAN_01
Figure 7-33. DCAN and MCAN Timings
CAUTION
The IO timings provided in this section are only valid if signals within a single
IOSET are used. The IOSETs are defined in Table 7-35.
In Table 7-35 are presented the specific groupings of signals (IOSET) for use with DCAN and MCAN.
SIGNALS
dcan1_tx
dcan1_rx
mcan_tx
mcan_rx
IOSET1
BALL
MUX
N5
0
N6
0
Table 7-35. DCAN and MCAN IOSETs
IOSET2
BALL
MUX
DCAN1
D14
12
D15
12
MCAN
W7
0
W6
0
IOSET3
BALL
MUX
F14
12
C14
12
F13
12
E14
12
IOSET4
BALL
MUX
F15
12
F16
12
7.16 Ethernet Interface (GMAC_SW)
The two-port gigabit ethernet switch subsystem (GMAC_SW) provides ethernet packet communication
and can be configured as an ethernet switch. It provides Reduced Gigabit Media Independent Interface
(RGMII), and the Management Data Input/Output (MDIO) for physical layer device (PHY) management.
NOTE
For more information, see the Gigabit Ethernet Switch (GMAC_SW) section of the Device
TRM.
NOTE
The Gigabit, Reduced and Media Independent Interface n (n = 0 to 1) are also referred to as
RGMIIn
Copyright © 2016–2017, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics 163
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