TDA3MV Datasheet, PDF (239/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
DDR_1V5
Rcp
Cac
A2
AT
A2
AT
Rcp
0.1 µF
=
SPRS91v_PCB_DDR3_20
Figure 8-63. CK Routing for One DDR3 Device
Rtt
A2
AT
Vtt
=
SPRS91v_PCB_DDR3_21
Figure 8-64. ADDR_CTRL Routing for One DDR3 Device
8.9.2.14 Data Topologies and Routing Definition
No matter the number of DDR3 devices used, the data line topology is always point to point, so its
definition is simple.
Care should be taken to minimize layer transitions during routing. If a layer transition is necessary, it is
better to transition to a layer using the same reference plane. If this cannot be accommodated, ensure
there are nearby ground vias to allow the return currents to transition between reference planes if both
reference planes are ground or vdds_ddr. Ensure there are nearby bypass capacitors to allow the return
currents to transition between reference planes if one of the reference planes is ground. The goal is to
minimize the size of the return current loops.
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Applications, Implementation, and Layout 239
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