TDA3MV Datasheet, PDF (172/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
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SIGNALS
mmc_dat2
mmc_dat3
BALL
E17
F17
Table 7-50. MMC IOSETs (continued)
IOSET1
MUX
5
5
BALL
Y15
W15
IOSET2
MUX
5
5
BALL
C20
A20
IOSET3
MUX
5
5
7.18 General-Purpose Interface (GPIO)
The general-purpose interface combines four general-purpose input/output (GPIO) banks. Each GPIO
module provides up to 32 dedicated general-purpose pins with input and output capabilities; thus, the
general-purpose interface supports up to 126 pins.
These pins can be configured for the following applications:
• Data input (capture)/output (drive)
• Keyboard interface with a debounce cell
• Interrupt generation in active mode upon the detection of external events. Detected events are
processed by two parallel independent interrupt-generation submodules to support biprocessor
operations
• Wake-up request generation in idle mode upon the detection of external events
NOTE
For more information, see the General-Purpose Interface chapter of the Device TRM.
NOTE
The general-purpose input/output i (i = 1 to 4) bank is also referred to as GPIOi.
CAUTION
The IO timings provided in this section are only valid if signals within a single
IOSET are used. The IOSETs are defined in Table 7-51.
In Table 7-51 are presented the specific groupings of signals (IOSET) for use with GPIO.
SIGNALS
gpio2_11
gpio2_12
gpio2_13
gpio2_14
gpio2_20
gpio2_23
gpio2_24
gpio2_27
gpio2_28
gpio2_29
gpio2_30
gpio2_31
BALL
AA17
U16
U15
V15
Y15
W15
AA15
Table 7-51. GPIO2/3/4 IOSETs
IOSET1
MUX
GPIO2
14
14
14
14
14
14
14
BALL
J17
K22
K21
K18
AB17
AA17
U16
IOSET2
MUX
14
14
14
14
14
14
14
172 Timing Requirements and Switching Characteristics
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