TDA3MV Datasheet, PDF (240/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
www.ti.com
8.9.2.14.1 DQS and DQ/DM Topologies, Any Number of Allowed DDR3 Devices
DQS lines are point-to-point differential, and DQ/DM lines are point-to-point singled ended. Figure 8-65
and Figure 8-66 show these topologies.
Processor
DQS
IO Buffer
DQSn+
DQSn-
DDR
DQS
IO Buffer
Routed Differentially
n = 0, 1, 2, 3
Figure 8-65. DQS Topology
SPRS91v_PCB_DDR3_22
Processor
DDR
DQ and DM
Dn
DQ and DM
IO Buffer
IO Buffer
n = 0, 1, 2, 3
Figure 8-66. DQ/DM Topology
SPRS91v_PCB_DDR3_23
8.9.2.14.2 DQS and DQ/DM Routing, Any Number of Allowed DDR3 Devices
Figure 8-67 and Figure 8-68 show the DQS and DQ/DM routing.
DQSn+
DQSn-
Routed Differentially
DQS
n = 0, 1, 2
SPRS91v_PCB_DDR3_24
Figure 8-67. DQS Routing With Any Number of Allowed DDR3 Devices
240 Applications, Implementation, and Layout
Copyright © 2016–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TDA3MV TDA3MA TDA3LX TDA3LA