TDA3MV Datasheet, PDF (201/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
Table 8-11. Length Mismatch Guidelines for CSI-2 (1.5 Gbps) (continued)
PARAMETER
Interlane skew (UI / 50)
(1) sdc12, scd21, scd12, sdc21, scd11, sdc11, scd22, and sdc22
TYPICAL VALUE
13.34
UNIT
ps
8.5.2.1.3 Frequency-domain Specification Guidelines
After the PCB design is finished, the S-parameters of the PCB differential lines will be extracted with a 3D
Maxwell Equation Solver such as the high-frequency structure simulator (HFSS) or equivalent, and
compared to the frequency-domain specification as defined in the section 7 of the MIPI Alliance
Specification for D-PHY Version v1-01-00_r0-03.
If the PCB lines satisfy the frequency-domain specification, the design is finished. Otherwise, the design
needs to be improved.
8.6 Clock Routing Guidelines
8.6.1 Oscillator Ground Connection
Although the impedance of a ground plane is low it is, of course, not zero. Therefore, any noise current in
the ground plane causes a voltage drop in the ground. Figure 8-21 shows the grounding scheme for slow
(low frequency) clock generated from the internal oscillator.
Device
rtc_osc_xi_clkin32
rtc_osc_xo
Crystal
Rd
(Optional)
C_f1
C_f2
SPRS91v_PCB_CLK_OSC_02
Figure 8-21. Grounding Scheme for Low-Frequency Clock
Figure 8-22 shows the grounding scheme for high-frequency clock.
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