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TDA3MV Datasheet, PDF (102/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0
TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
www.ti.com
6.1.1 Input Clock Requirements
• The source of the internal system clock (SYS_CLK1) could be either:
– A CMOS clock that enters on the xi_osc0 ball (with xo_osc0 left unconnected on the CMOS clock
case).
– A crystal oscillator clock managed by xi_osc0 and xo_osc0.
• The source of the internal system clock (SYS_CLK2) could be either:
– A CMOS clock that enters on the xi_osc1 ball (with xo_osc1 left unconnected on the CMOS clock
case).
– A crystal oscillator clock managed by xi_osc1 and xo_osc1.
6.1.2 System Oscillator OSC0 Input Clock
SYS_CLK1 is received directly from oscillator OSC0. For more information about SYS_CLK1 see Device
TRM, Chapter: Power, Reset, and Clock Management.
6.1.2.1 OSC0 External Crystal
An external crystal is connected to the device pins. Figure 6-2 describes the crystal implementation.
Device
xi_osc0
xo_osc0
vssa_osc0
Crystal
Rd
(Optional)
Cf1
Cf2
SPRS91v_CLK_02
Figure 6-2. Crystal Implementation
NOTE
The load capacitors, Cf1 and Cf2 in Figure 6-2, should be chosen such that the below
equation is satisfied. CL in the equation is the load specified by the crystal manufacturer. All
discrete components used to implement the oscillator circuit should be placed as close as
possible to the associated oscillator xi_osc0, xo_osc0, and vssa_osc0 pins.
CL=
C C f1 f2
(Cf1+Cf2)
Figure 6-3. Load Capacitance Equation
The crystal must be in the fundamental mode of operation and parallel resonant. Table 6-1 summarizes
the required electrical constraints.
NAME
fp
Cf1
Table 6-1. OSC0 Crystal Electrical Characteristics
DESCRIPTION
Parallel resonance crystal frequency
Cf1 load capacitance for crystal parallel resonance with Cf1 = Cf2
MIN
TYP
MAX
19.2, 20, 27
12
24
UNIT
MHz
pF
102 Clock Specifications
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