TDA3MV Datasheet, PDF (12/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
BALL NUMBER [1]
BALL NAME [2]
M19
adc_in0
M20
adc_in1
M21
adc_in2
M22
adc_in3
N22
adc_in4
N21
adc_in5
P19
adc_in6
P18
adc_in7
P20
adc_vrefp
N15
cap_vddram_core1
M15
cap_vddram_core2
M14
cap_vddram_dspeve
A11
csi2_0_dx0
A12
csi2_0_dx1
A13
csi2_0_dx2
A15
csi2_0_dx3
A16
csi2_0_dx4
B11
csi2_0_dy0
B12
csi2_0_dy1
B13
csi2_0_dy2
B15
csi2_0_dy3
B16
csi2_0_dy4
T18
cvideo_rset
T17
cvideo_tvout
P17
cvideo_vfb
N6
dcan1_rx
SIGNAL NAME [3]
adc_in0
adc_in1
adc_in2
adc_in3
adc_in4
adc_in5
adc_in6
adc_in7
adc_vrefp
cap_vddram_core1
cap_vddram_core2
cap_vddram_dspeve
csi2_0_dx0
csi2_0_dx1
csi2_0_dx2
csi2_0_dx3
csi2_0_dx4
csi2_0_dy0
csi2_0_dy1
csi2_0_dy2
csi2_0_dy3
csi2_0_dy4
cvideo_rset
cvideo_tvout
cvideo_vfb
dcan1_rx
gpio4_10
Driver off
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Table 4-2. Ball Characteristics⁽¹⁾
MA/LX/LA MUXMODE
[4]
[5]
TYPE [6]
BALL
RESET
STATE [7]
BALL
RESET
REL.
STATE [8]
BALL
RESET
I/O
REL. VOLTAGE
MUXMODE VALUE [10]
[9]
POWER
[11]
HYS [12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
DSIS [15]
0
A
OFF
OFF
0
1.8
vdda_adc NA
GPADC NA
0
A
OFF
OFF
0
1.8
vdda_adc NA
GPADC NA
0
A
OFF
OFF
0
1.8
vdda_adc NA
GPADC NA
0
A
OFF
OFF
0
1.8
vdda_adc NA
GPADC NA
0
A
OFF
OFF
0
1.8
vdda_adc NA
GPADC NA
0
A
OFF
OFF
0
1.8
vdda_adc NA
GPADC NA
0
A
OFF
OFF
0
1.8
vdda_adc NA
GPADC NA
0
A
OFF
OFF
0
1.8
vdda_adc NA
GPADC NA
0
A
OFF
OFF
0
1.8
vdda_adc NA
GPADC NA
CAP
CAP
CAP
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
0
I
OFF
OFF
0
1.8
vdda_csi Yes
LVCMOS PU/PD
CSI2
N/Y/N 0
A
OFF
OFF
0
1.8
vdda_dac NA
AVDAC NA
N/Y/N 0
A
OFF
OFF
0
1.8
vdda_dac NA
AVDAC NA
N/Y/N 0
A
OFF
OFF
0
1.8
vdda_dac NA
AVDAC NA
0
IO
PU
PU
15
1.8/3.3
vddshv1 Yes
Dual
PU/PD
14
IO
Voltage
LVCMOS
15
I
12
Terminal Configuration and Functions
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