 English |
|
|
|
|
|
|
|
| TDA3MV Datasheet, PDF (173/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0 | |||
| |||
| ◁ |
www.ti.com
TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C â JUNE 2016 â REVISED JULY 2017
SIGNALS
gpio3_0
gpio3_9
gpio3_10
gpio3_11
gpio3_12
gpio3_13
gpio3_14
gpio3_15
gpio3_16
gpio4_4
gpio4_6
gpio4_7
gpio4_8
gpio4_9
gpio4_10
Table 7-51. GPIO2/3/4 IOSETs (continued)
BALL
AB15
U9
W11
V9
W9
U8
W8
U7
V7
IOSET1
MUX
GPIO3
14
14
14
14
14
14
14
14
14
GPIO4
BALL
U9
W11
V9
W9
U8
W8
R5
N4
R7
L2
N5
N6
IOSET2
MUX
14
14
14
14
14
14
14
14
14
14
14
14
7.19 Test Interfaces
The device includes the following Test interfaces:
⢠IEEE 1149.1 Standard-Test-Access Port (JTAG)
⢠Trace Port Interface Unit (TPIU)
7.19.1 JTAG Electrical Data/Timing
Table 7-52, Table 7-53 and Figure 7-45 assume testing over the recommended operating conditions and
electrical characteristic conditions below.
NO.
1
1a
1b
3
4
PARAMETER
tc(TCK)
tw(TCKH)
tw(TCKL)
tsu(TDI-TCK)
tsu(TMS-TCK)
th(TCK-TDI)
th(TCK-TMS)
Table 7-52. Timing Requirements for IEEE 1149.1 JTAG
DESCRIPTION
Cycle time, TCK
Pulse duration, TCK high (40% of tc)
Pulse duration, TCK low (40% of tc)
Input setup time, TDI valid to TCK high
Input setup time, TMS valid to TCK high
Input hold time, TDI valid from TCK high
Input hold time, TMS valid from TCK high
MIN
62.29
24.92
24.92
6.23
6.23
31.15
31.15
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
Table 7-53. Switching Characteristics Over Recommended Operating Conditions for IEEE 1149.1 JTAG
NO.
2
PARAMETER
td(TCKL-TDOV)
DESCRIPTION
Delay time, TCK low to TDO valid
MIN
MAX
UNIT
0
30.5
ns
Copyright © 2016â2017, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics 173
Submit Documentation Feedback
Product Folder Links: TDA3MV TDA3MA TDA3LX TDA3LA
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese