TDA3MV Datasheet, PDF (72/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
www.ti.com
Table 4-26. PRCM Signal Descriptions (continued)
SIGNAL NAME
xref_clk1
xref_clk2
xi_osc0
xi_osc1
xo_osc0
xo_osc1
DESCRIPTION
External Reference Clock 1. For Audio and other Peripherals.
External Reference Clock 2. For Audio and other Peripherals.
System Oscillator OSC0 Crystal input / LVCMOS clock input. Functions as the input
connection to a crystal when the internal oscillator OSC0 is used. Functions as an
LVCMOS-compatible input clock when an external oscillator is used.
Auxiliary Oscillator OSC1 Crystal input / LVCMOS clock input. Functions as the
input connection to a crystal when the internal oscillator OSC1 is used. Functions as
an LVCMOS-compatible input clock when an external oscillator is used
System Oscillator OSC0 Crystal output
Auxiliary Oscillator OSC1 Crystal output
TYPE
I
I
I
I
O
O
4.4.22.3 Enhanced Direct Memory Access (EDMA)
BALL
F14, F15
H19
E22
B21
D22
C21
NOTE
For more information, see the DMA Controllers / Enhanced DMA section of the device TRM.
Table 4-27. EDMA Signal Descriptions
SIGNAL NAME
dma_evt1
dma_evt2
dma_evt3
dma_evt4
DESCRIPTION
Enhanced DMA Event Input 1
Enhanced DMA Event Input 2
Enhanced DMA Event Input 3
Enhanced DMA Event Input 4
4.4.22.4 Interrupt Controllers (INTC)
TYPE
I
I
I
I
NOTE
For more information, see the Interrupt Controllers section of the device TRM.
BALL
C12, K17
D12, K19
E12
F12, D8
Table 4-28. INTC Signal Descriptions
SIGNAL NAME
nmin
sys_nirq1
sys_nirq2
esm_error
DESCRIPTION
Non maskable interrupt input - active-low. This pin can be optionally routed to the
DSP NMI input or as generic input to the ARM cores.
External interrupt event to any device INTC
External interrupt event to any device INTC
This signal indicates a severe device failure. For more information see Error
Signaling Module in the device TRM.
4.4.23 Power Supplies
TYPE
I
I
I
IO
BALL
G5
K18, K22
J17, K21
AA15 , B17
NOTE
For more information, see Power, Reset, and Clock Management / PRCM Subsystem
Environment / External Voltage Inputs section of the device TRM.
72
Terminal Configuration and Functions
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