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| TDA3MV Datasheet, PDF (57/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0 | |||
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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C â JUNE 2016 â REVISED JULY 2017
Table 4-11. EMIF Signal Descriptions (continued)
SIGNAL NAME
ddr1_casn
ddr1_ba0
ddr1_ba1
ddr1_ba2
ddr1_a0
ddr1_a1
ddr1_a2
ddr1_a3
ddr1_a4
ddr1_a5
ddr1_a6
ddr1_a7
ddr1_a8
ddr1_a9
ddr1_a10
ddr1_a11
ddr1_a12
ddr1_a13
ddr1_a14
ddr1_a15
ddr1_d0
ddr1_d1
ddr1_d2
ddr1_d3
ddr1_d4
ddr1_d5
ddr1_d6
ddr1_d7
ddr1_d8
ddr1_d9
ddr1_d10
ddr1_d11
ddr1_d12
ddr1_d13
ddr1_d14
ddr1_d15
ddr1_d16
ddr1_d17
ddr1_d18
ddr1_d19
ddr1_d20
ddr1_d21
ddr1_d22
ddr1_d23
ddr1_d24
ddr1_d25
ddr1_d26
DESCRIPTION
EMIF1 Column Address Strobe; When LPDDR2 is used this signal functions as
ddr1_ca1
EMIF1 Bank Address; When LPDDR2 is used this signal functions as ddr1_ca7
EMIF1 Bank Address; When LPDDR2 is used this signal functions as ddr1_ca8
EMIF1 Bank Address; When LPDDR2 is used this signal functions as ddr1_ca9
EMIF1 Address Bus
EMIF1 Address Bus; When LPDDR2 is used this signal functions as ddr1_ca5
EMIF1 Address Bus; When LPDDR2 is used this signal functions as ddr1_ca6
EMIF1 Address Bus
EMIF1 Address Bus
EMIF1 Address Bus
EMIF1 Address Bus
EMIF1 Address Bus
EMIF1 Address Bus
EMIF1 Address Bus
EMIF1 Address Bus; When LPDDR2 is used this signal functions as ddr1_ca4
EMIF1 Address Bus
EMIF1 Address Bus
EMIF1 Address Bus; When LPDDR2 is used this signal functions as ddr1_ca3
EMIF1 Address Bus
EMIF1 Address Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
EMIF1 Data Bus
TYPE
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
BALL
F2
B3
A3
D2
U4
C1
D3
R4
T4
N3
T2
N2
T1
U1
D1
R3
U2
C3
R2
V1
AA6
AA8
Y8
AA7
AB4
Y5
AA4
Y6
AA18
Y21
AA21
Y22
AA19
AB20
Y17
AB18
AA3
AA2
Y3
V2
U3
V3
Y2
Y1
U21
T20
R21
Copyright © 2016â2017, Texas Instruments Incorporated
Terminal Configuration and Functions
57
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