TDA3MV Datasheet, PDF (225/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

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32-bit DDR3 EMIF
ddrx_d31
8
ddrx_d24
ddrx_dqm3
ddrx_dqs3
ddrx_dqsn3
ddrx_d23
8
ddrx_d16
ddrx_dqm2
ddrx_dqs2
ddrx_dqsn2
ddrx_d15
8
ddrx_d8
ddrx_dqm1
ddrx_dqs1
ddrx_dqsn1
ddrx_d7
8
ddrx_d0
ddrx_dqm0
ddrx_dqs0
ddrx_dqsn0
ddrx_ck
ddrx_nck
ddrx_odt0
ddrx_csn0
ddrx_ba0
ddrx_ba1
ddrx_ba2
ddrx_a0
16
ddrx_a15
ddrx_casn
ddrx_rasn
ddrx_wen
ddrx_cke
ddrx_rst
TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
16-Bit DDR3
Devices
DQ15
DQ8
UDM
UDQS
UDQS
DQ7
DQ15
D08
LDM
LDQS
LDQS
DQ8
UDM
UDQS
UDQS
DQ7
DQ0
LDM
LDQS
LDQS
CK
CK
ODT
CS
BA0
BA1
BA2
A0
CK
CK
ODT
CS
BA0
BA1
BA2
A0
A15
CAS
RAS
WE
CKE
RST
ZQ
ZQ
VREFDQ
VREFCA
0.1 µF
A15
CAS
RAS
WE
CKE
RST
ZQ
VREFDQ
VREFCA
0.1 µF
Zo ^{0.1 µF}
DDR_1V5
Zo
DDR_VTT
Zo
Zo
DDR_VREF
ZQ
Zo
Termination is required. See terminator comments.
ZQ
Value determined according to the DDR memory device data sheet.
Figure 8-46. 32-Bit, One-Bank DDR3 Interface Schematic Using Two 16-Bit DDR3 Devices
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Applications, Implementation, and Layout 225
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