XC164-16 Datasheet, PDF (388/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
Table 21-9 shows the required register setting to configure the IO lines of the TwinCAN
module for operation.
Table 21-9
Port Lines
TwinCAN IO Selection and Setup
Alternate Select
Register
Port Input Select
Register
TwinCAN Node A
P4.5 / RxDCA –
P4.6 / TxDCA ALTSEL0P4.P6 = 1
P4.7 / RxDCA –
P9.2 / RxDCA –
P9.3 / TxDCA ALTSEL0P9.P3 = 1
and
ALTSEL1P9.P3 =1
TwinCAN Node B
P4.4 / RxDCB –
P4.7 / TxDCB ALTSEL0P4.P7 = 1
P9.0 / RxDCB –
P9.1 / TxDCB ALTSEL0P9.P1 = 1
and
ALTSEL1P9.P1 =1
CAN_PISEL[2:0] =
000
–
CAN_PISEL[2:0] =
001
CAN_PISEL[2:0] =
011
–
CAN_PISEL[5:3] =
000
–
CAN_PISEL[5:3] =
001
–
Direction
Control
Register
DP4.P5 = 0
DP4.P6 = 1
DP4.P7 = 0
DP9.P2 = 0
DP9.P3 = 1
DP4.P4 = 0
DP4.P7 = 1
DP9.P0 = 0
DP9.P1 = 1
IO
Input
Output
Input
Input
Output
Input
Output
Input
Output
Note: The ALTSEL1 register of Port 4 is ‘don’t care’ for selecting the TwinCAN alternate
output function.
User’s Manual
TwinCAN_X41, V2.1
21-88
V2.1, 2004-03