XC164-16 Datasheet, PDF (151/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Unit 6 (CAPCOM6)
18.1.1 Timer T12 Operation
The input clock f_T12 of Timer T12 is derived from the module clock f_CC6 through a
programmable prescaler and an optional 1/256 divider. The resulting prescale factors
are listed in Table 18-1. The prescaler of T12 is reset while T12 is not running to ensure
reproducible timings and delays.
Table 18-1
T12CLK
000_B
001_B
010_B
011_B
100_B
101_B
110_B
111_B
Timer T12 Input Clock Options
Resulting Input Clock
Prescaler Off (T12PRE = 0)
f_CC6
f_CC6/2
f_CC6/4
f_CC6/8
f_CC6/16
f_CC6/32
f_CC6/64
f_CC6/128
Resulting Input Clock
Prescaler On (T12PRE = 1)
f_CC6/256
f_CC6/512
f_CC6/1024
f_CC6/2048
f_CC6/4096
f_CC6/8192
f_CC6/16384
f_CC6/32768
The period of the timer is determined by the value in the period Register T12PR and by
the timer mode.
In Edge-Aligned mode, the timer period is:
T12_PER = <Period-Value> + 1; in T12 clocks (f_T12)
(18.1)
In Center-Aligned mode, the timer period is:
T12_PER = (<Period-Value> + 1) × 2; in T12 clocks (f_T12)
(18.2)
While Timer T12 is running, write accesses to the count register T12 are not taken into
account. If T12 is stopped and the Dead-Time counters are 0, write actions to register
T12 are immediately taken into account.
User’s Manual
CAPCOM6_X, V2.0
18-7
V2.1, 2004-03