XC164-16 Datasheet, PDF (347/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

21.2
TwinCAN Register Description
XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
21.2.1 Register Map
Figure 21-26 shows all registers associated with the TwinCAN module kernel.
CAN Node A
Registers
ACR
ASR
AIR
ABTR
AGINP
AFCR
AIMR0
AIMR4
AECNT
CAN Node B
Registers
BCR
BSR
BIR
BBTR
BGINP
BFCR
BIMR0
BIMR4
BECNT
CAN Message
Object
Registers ¹⁾
MSGDRn0
MSGDRn4
MSGARn
MSGAMRn
MSGCTRn
MSGCFGn
MSGFGCRn
Global CAN
Control / Status
Registers
RXIPND
TXIPND
ACR
ASR
AIR
ABTR
AGINP
AFCR
AIMR0
AIMR4
AECNT
Node A Control Register
Node A Status Register
Node A Interrupt Pending Register
Node A Bit Timing Register
Node A Global Int. Node Pointer Reg.
Node A Frame Counter Register
Node A INTID Mask Register 0
Node A INTID Mask Register 4
Node A Error Counter Register
BCR
BSR
BIR
BBTR
BGINP
BFCR
BIMR0
BIMR4
BECNT
Node B Control Register
Node B Status Register
Node B Interrupt Pending Register
Node B Bit Timing Register
Node B Global Int. Node Pointer Reg.
Node B Frame Counter Register
Node B INTID Mask Register 0
Node B INTID Mask Register 4
Node B Error Counter Register
MSGDRn0
MSGARn
MSGCTRn
MSGFGCRn
Msg. Object n Data Register 0
Msg. Object n Arbitration Register
Msg. Object n Control Register
Msg. Object n FIFO/Gatew. Cont. Reg.
MSGDRn4 Msg. Object n Data Register 4
MSGAMRn Msg. Object n Acceptance Mask Reg.
MSGCFGn Msg. Object n Configuration Register
RXIPND
Receive Interrupt Pending Register
TXIPND Transmit Interrupt Pending Register
1) The number ‘n’ indicates the message object number, n = 0 … 31.
MCA05496
Figure 21-26 TwinCAN Kernel Registers
User’s Manual
TwinCAN_X41, V2.1
21-47
V2.1, 2004-03