XC164-16 Datasheet, PDF (236/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Asynchronous/Synchronous Serial Interface (ASC)
If the TXFIFO is full and additional bytes are written into TBUF, the error interrupt will be
generated with bit OE set. In this case, the data byte that was last written into the transmit
FIFO is overwritten and the transmit FIFO filling level TXFFL is set to maximum.
The TXFIFO can be flushed or cleared by setting bit TXFFLU in register
ASCx_TXFCON. After this TXFIFO flush operation, the TXFIFO is empty and the
transmit FIFO filling level TXFFL is set to 0000_B. A running serial transmission is not
aborted by a receive FIFO flush operation
Note: The TXFIFO is flushed automatically with a reset operation of the ASC module
and if the TXFIFO becomes disabled (resetting bit TXFEN) after it was previously
enabled.
User’s Manual
ASC_X, V2.0
19-11
V2.1, 2004-03