XC164-16 Datasheet, PDF (219/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Unit 6 (CAPCOM6)
Registers ISS and ISR contain write-only bits corresponding to the interrupt and status
flags in register IS (except for bit 11). By writing 1s to these bits, software can set (ISS)
or clear (ISR) the associated flag(s). Reading these bits always returns 0s.
Setting a bit in register ISS will set the corresponding flag in register IS and may trigger
an interrupt request (if enabled and if available for that function).
Setting a bit in register ISR will clear the corresponding flag in register IS.
CCU6_ISS
Interrupt Status Set Register
XSFR (E8D2_H/--)
Reset Value: 0000_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-
SSS
IDLE WHE CHE
-
SSSSSSSSSSS
TRP T13 T13 T12 T12 CC CC CC CC CC CC
F PM CM PM OM 62F 62R 61F 61R 60F 60R
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Field
Bits Type Description¹⁾
SIDLE
14
w
Set IDLE Flag
SWHE
13
w
Set Wrong Hall Event Flag
SCHE
12
w
Set Correct Hall Event Flag
STRPF
10
w
Set Trap Flag
ST13PM
9
w
Set Timer T13 Period-Match Flag
ST13CM
8
w
Set Timer T13 Compare-Match Flag
ST12PM
7
w
Set Timer T12 Period-Match Flag
ST12OM
6
w
Set Timer T12 One-Match Flag
SCC62F
SCC61F
SCC60F
5
w
Set Capture, Compare-Match Falling Edge Flag
3
1
SCC62R
SCC61R
SCC60R
4
w
Set Capture, Compare-Match Rising Edge Flag
2
0
1) Writing 1 to one of these bits will set the associated flag. Writing 0 has no effect.
User’s Manual
CAPCOM6_X, V2.0
18-75
V2.1, 2004-03