XC164-16 Datasheet, PDF (294/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
High-Speed Synchronous Serial Interface (SSC)
20.2.4 Continuous Transfers
When the transmit interrupt request flag is set, it indicates that the transmit buffer
SSCx_TB is empty and ready to be loaded with the next transmit data. If SSCx_TB has
been reloaded by the time the current transmission is finished, the data is immediately
transferred to the shift register and the next transmission will start without any additional
delay. On the data line, there is no gap between the two successive frames. For
example, two 8-bit transfers would look the same as one 16-bit transfer. This feature can
be used to interface with devices that can operate with or require more than 16 data bits
per transfer. It is just a matter of software, how long a total data frame length can be. This
option can also be used to interface to byte-wide and word-wide devices on the same
serial bus, for instance.
Note: Of course, this can happen only in multiples of the selected basic data width,
because it would require disabling/enabling of the SSC to reprogram the basic
data width on-the-fly.
20.2.5 Baudrate Generation
The serial channel SSC has its own dedicated 16-bit Baudrate Generator with 16-bit
reload capability, facilitating baudrate generation independent of the timers. Figure 20-6
shows the baudrate generator of the SSC in more detail.
16-bit Reload Register
f
SSC
2
16-bit Counter
f
SCLK
f_SCLKmax
in
Master
Mode
≤
f
SSC
/
2
f_SCLKmax in Slave Mode ≤ f_SSC / 4
MCA05459
Figure 20-6 SSC Baudrate Generator
The Baudrate Generator is clocked with the module clock f_SSC. The counter counts
downwards. Access to the Baudrate Generator is performed via one register, SSCx_BR,
described below.
User’s Manual
SSC_X, V2.0
20-12
V2.1, 2004-03