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XC164-16 Datasheet, PDF (204/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units
XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Unit 6 (CAPCOM6)
Register MCMCTR contains control bits for the Multi-Channel mode, controlling the
output modulation pattern.
CCU6_MCMCTR
Multi-Ch. Mode Control Reg.
15 14 13 12 11 10
- -----
- -----
XSFR (E8CEH/--)
9876
----
----
Reset Value: 0000H
543210
SWSYN -
rw
-
SWSEL
rw
Field
SWSYN
SWSEL
Bits Type Description
[5:4] rw
Switching Synchronization
SWSYN triggers the shadow transfer from MCMPS
to MCMP, if it has been requested before (flag R set)
by an event selected by SWSEL. This permits the
synchronization of the outputs to the source which is
used for modulation (T12 or T13). See Table 18-9.
[2:0] rw
Switching Selection
SWSEL selects the trigger source (next multi-
channel event) for the shadow transfer from MCMPS
to MCMP. The transfer takes place synchronously
with the selected event. See Table 18-8.
Note: The generation of the shadow transfer request by HW is only enabled if bit
MCMEN = 1.
User’s Manual
CAPCOM6_X, V2.0
18-60
V2.1, 2004-03