XC164-16 Datasheet, PDF (340/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
21.1.7 Programming the TwinCAN Module
A software initialization should be performed by setting bit INIT in the CAN node specific
control register ACR/BCR to ‘1’. While bit INIT is set, all message transfers between the
CAN controller and the CAN bus are disabled.
The initialization routine should process the following tasks:
• configuration of the corresponding node,
• initialization of each associated message object.
21.1.7.1 Configuration of CAN Node A/B
Each CAN node can be individually configured by programming the associated register.
Depending on the content of the ACR/BCR control registers, the normal operation mode
or the CAN analyzer mode is activated. Furthermore, various interrupt categories (status
change, error, last error) can be enabled or disabled.
The bit timing is defined by programming the ABTR/BBTR register. The prescaler value,
the synchronization jump width and the time segments, arranged before and after the
sample point, depend on the characteristic of the CAN bus segment linked to the
corresponding CAN node.
The global interrupt node pointer register (AGINP/BGINP) controls multiplexer
connecting an interrupt request source (error, last error, global transmit/receive and
frame counter overflow interrupt request) with one of the eight common interrupt nodes.
The contents of the INTID mask register (AIMR0/4 and BIMR0/4) decides which interrupt
sources may be reported by the AIR/BIR interrupt pending register.
21.1.7.2 Initialization of Message Objects
The message memory space, containing 32 message objects, is shared by both CAN
nodes. Each message object has to be configured concerning its target node and
operation properties. An initialization of the message object properties is always started
with disabling the message object via MSGVAL = ‘01’.
The CAN node, associated with a message, is defined by bit NODE in register
MSGCFGn. The message object can be also defined as gateway, transferring
information from CAN node A to B or vice versa. In this case, the FIFO/Gateway control
register MSGFGCRn must be programmed to specify the gateway mode (bitfield MMC),
the target interrupt node and further details of the information handover.
The identifier, correlated with a message, is set up in register MSGARn. Bit XTD in
register MSGCFGn indicates, whether an extended 29-bit or a standard 11-bit identifier
is used and has to be set accordingly. Incoming messages can be filtered by the mask
defined in register MSGAMRn.
The message interrupt handling can be individually configured for transmit and receive
direction. The direction specific interrupt is enabled by bits TXIE and RXIE in register
MSGCNTn and the target interrupt node is selected by bitfields TXINP and RXINP in
User’s Manual
TwinCAN_X41, V2.1
21-40
V2.1, 2004-03