XC164-16 Datasheet, PDF (349/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
21.2.2 CAN Node A/B Registers
The Node Control Register controls the initialization, defines the node specific interrupt
handling and selects an operation mode.
ACR
Node A Control Register
BCR
Node B Control Register
15 14 13 12 11 10 9
0
r
Reset Value: 0001_H
Reset Value: 0001_H
876543210
CAL
M
CCE
0
LEC
IE
EIE
SIE
0
INIT
rw rw r rw rw rw r rwh
Field
INIT
SIE
EIE
Bits Type Description
0
rwh Initialization
0 Resetting bit INIT starts the synchronization to
the CAN bus. After a synchronization
procedure¹⁾, the node takes part in CAN
communication.
1 After setting bit INIT, the CAN node stops all CAN
bus activities and all registers can be initialized
without any impact on the actual CAN bus traffic.
Bit INIT is automatically set when the bus-off
state is entered.
2
rw Status Change Interrupt Enable
A status change interrupt occurs when a message
transfer (indicated by the flags TXOK or RXOK in the
status registers ASR or BSR) is successfully
completed.
0 Status change interrupt is disabled.
1 Status change interrupt is enabled.
3
rw Error Interrupt Enable
An error interrupt is generated on a change of bit BOFF
or bit EWRN in the status registers ASR or BSR.
0 Error interrupt is disabled.
1 Error interrupt is enabled.
User’s Manual
TwinCAN_X41, V2.1
21-49
V2.1, 2004-03