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XC164-16 Datasheet, PDF (380/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units
XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
21.2.4 Global CAN Control/Status Registers
The Receive Interrupt Pending Register indicates the pending receive interrupts for
message object n.
RXIPNDH
Receive Interrupt Pending Register High
RXIPNDL
Receive Interrupt Pending Register Low
15 14 13 12 11 10 9 8 7 6 5
RXIPNDn (n = 31-16)
rh
15 14 13 12 11 10 9 8 7 6 5
RXIPNDn (n = 15-0)
rh
Reset Value: 0000H
Reset Value: 0000H
43210
43210
Field
RXIPNDn
(n = 15-0)
RXIPND
(n = 31-16)
Bits
n
Low
n-16
High
Type Description
rh Message Object n Receive Interrupt Pending
Bit RXIPNDn is set by hardware if message object n
received a frame and bit RXIEn has been set.
0 No receive is pending for message object n.
1 Receive is pending for message object n.
RXIPNDn can be cleared by software via resetting the
corresponding bit INTPNDn.
User’s Manual
TwinCAN_X41, V2.1
21-80
V2.1, 2004-03