XC164-16 Datasheet, PDF (188/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Unit 6 (CAPCOM6)
CCU6_TCTR4
Timer Control Register 4
XSFR (E8A6_H/--)
15 14 13 12 11 10 9 8 7 6 5
T13 T13
STD STR
-
-
-
T13 T13 T13 T12 T12
RES RS RR STD STR
-
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Reset Value: 0000_H
43210
-
DT T12 T12 T12
RES RES RS RR
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Field
Bits Type Description
T13STD
T12STD
15
w
7
Timer T13/T12 Shadow Transfer Disable
0 No action
1 STE13/STE12 is cleared without triggering the
shadow transfer
T13STR
T12STR
14
w
6
Timer T13/T12 Shadow Transfer Request
0 No action
1 STE13/STE12 is set, requesting the shadow
transfer
T13RES
T12RES
10
w
2
Timer T13/T12 Reset
0 No effect on T13/T12
1 The T13/T12 counter register is reset to zero.
The switching of the output signals is
according to the switching rules. Setting of
T13RES/T12RES has no impact on bit
T13R/T12R.
T13RS
T12RS
9
w
Timer T13/T12 Run Bit Set Control¹⁾
1
Software can set bit T13R/T12R (start timer T13/T12)
by writing to bit T13RS/T12RS.
0 T13R/T12R is not set
1 T13R/T12R is set, T13/T12 starts counting
T13RR
T12RR
8
w
Timer T13/T12 Run Bit Reset Control¹⁾
0
Software can clear bit T13R/T12R (stop timer
T13/T12) by writing to bit T13RR/T12RR.
0 T13R/T12R is not cleared
1 T13R/T12R is cleared, T13/T12 stops counting
DTRES
3
w
Dead-Time Counter Reset
0 No effect on the Dead-Time counters
1 All three Dead-Time counters are cleared and
stopped
1) Setting the respective set- and reset-control bits together will not influence the associated timer.
User’s Manual
CAPCOM6_X, V2.0
18-44
V2.1, 2004-03