XC164-16 Datasheet, PDF (154/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Unit 6 (CAPCOM6)
T12 Shadow Transfer Signal, T12_ST
A special shadow transfer signal (T12_ST) can be generated to facilitate updating the
period and compare values synchronously to the operation of T12. The generation of this
signal is requested by software via bit STE12 (set by writing 1 to the write-only bit
T12STR, cleared by writing 1 to the write-only bit T12STD).
If requested (STE12 = 1), signal T12_ST is generated when:
• a Period-Match is detected while counting up, or
• the counter reaches 0001_H while counting down, or
• timer T12 is not running (T12R = 0)
When signal T12_ST is active, a shadow register transfer is triggered with the next cycle
of the T12 clock. A new period value is loaded from the shadow register into the actual
period register T12PR, and new compare values are transferred from their shadow
registers into the actual compare registers (see Section 18.1.2). With the shadow
register transfer bit STE12 is automatically cleared.
T12 Start/Stop and Reset Control
Timer T12 is counting while bit T12R is set. Software can control the timer’s count
operation via bit T12R (set by writing 1 to the write-only bit T12RS, cleared by writing 1
to the write-only bit T12RR). T12R can also be cleared by hardware in Single Shot mode.
Software can clear timer T12 by writing 1 to the write-only bit T12RES. This operation
only sets the timer contents to 0000_H. No further actions will take place, for example, the
timer run bit is not cleared.
User’s Manual
CAPCOM6_X, V2.0
18-10
V2.1, 2004-03