XC164-16 Datasheet, PDF (348/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
Module
Offset
+000_H
+200_H
+240_H
+280_H
+2C0_H
+300_H
+320_H
+340_H
Reserved
CAN Node A
Registers
CAN Node B
Registers
Global Control
Registers
Reserved
Message Object 0
Message Object 1
Message Object 2
...
+6E0_H
Message Object n
...
Message Object 31
Node A
Node B
Figure 21-27 TwinCAN Kernel Address Map
Control Reg.
Status Reg.
Interrupt Pending Reg.
Bit Timing Reg.
Global INP Reg.
Frame Counter Reg.
INTID Mask 0 Reg.
INTID Mask 4 Reg.
Error Counter Reg.
+00_H
+04_H
+08_H
+0C_H
+10_H
+14_H
+18_H
+1C_H
+20_H
Control Reg.
Status Reg.
Interrupt Pending Reg.
Bit Timing Reg.
Global INP Reg.
Frame Counter Reg.
INTID Mask 0 Reg.
INTID Mask 4 Reg.
Error Counter Reg.
+00_H
+04_H
+08_H
+0C_H
+10_H
+14_H
+18_H
+1C_H
+20_H
Receive Int. Pending
Transmit Int. Pending
+04_H
+08_H
Data Register 0
Data Register 4
Arbitration Register
Acceptance Mask Reg.
Message Control Reg.
Message Config. Reg.
FIFO/Gateway Control
+00_H
+04_H
+08_H
+0C_H
+10_H
+14_H
+18_H
MCA05497
User’s Manual
TwinCAN_X41, V2.1
21-48
V2.1, 2004-03