XC164-16 Datasheet, PDF(186/417 Page) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

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XC164-16 Datasheet, PDF (186/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

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XC164-16 Derivatives

Peripheral Units (Vol. 2 of 2)

Capture/Compare Unit 6 (CAPCOM6)

Field

Bits Type Description

STE121)

5

rh

Timer T12 Shadow Transfer Enable

0 The shadow register transfer is not requested

1 The shadow register transfer is requested

T12R2)

4

rh

Timer T12 Run Bit

T12R starts and stops Timer T12. It is set/reset by

SW via bits T12RR or T12RS, or it is reset by HW

according to the function defined by bitfield T12SSC.

0 Timer T12 is stopped

1 Timer T12 is running

T12PRE

3

rw

Timer T12 Prescaler Enable Bit

Enables the additional 1/256-prescaler of T12

0 The additional prescaler is disabled

1 The additional prescaler is enabled

T12CLK

[2:0] rw

Timer T12 Input Clock Select

Selects the input clock for Timer T12 which is derived

from the CAPCOM6 input clock according to the

equation:

fT12 = fCC6/2<T12CLK>. See Table 18-1.

1) Bit STE12/STE13 is cleared when the shadow transfer takes place.

2) A concurrent set/reset action on T13R/T12R (from TxSSC, TxRR or TxRS) will have no effect. Bit T13R/T12R

will remain unchanged.

Note: A write action to the bitfields T12CLK/T13CLK or T12PRE/T13PRE is only taken

into account while timer T12/T13 is not running (T12/T13R = 0).

Userâs Manual

CAPCOM6_X, V2.0

18-42

V2.1, 2004-03

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