XC164-16 Datasheet, PDF (101/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
The Analog/Digital Converter
Standard Timing Control
Standard timing control is performed by using two 2-bit fields in register ADC_CON.
Bitfield ADCTC (conversion time control) selects the basic conversion clock (f_BC), used
for the operation of the A/D converter. The sample time is derived from this conversion
clock and controlled by bitfield ADSTC. The sample time is always a multiple of 8 f_BC
periods. Table 16-3 lists the possible combinations.
Table 16-3 Standard Conversion and Sample Timing Control
ADC_CON.15|14
(ADCTC)
00
01
10
11
A/D Converter
Basic Clock f_BC1)
f_ADC/4
f_ADC/2
f_ADC/16
f_ADC/8
ADC_CON.13|12
(ADSTC)
00
01
10
11
Sample Time t_S
t_BC × 8
t_BC × 16
t_BC × 32
t_BC × 64
Improved Timing Control
To provide a finer resolution for programming of the timing parameters, wider bitfields
have been implemented for timing control (the 2-bit bitfields in register ADC_CON are
disregarded in all cases).
In compatibility mode (with bit ICST = 1), the bitfields in register ADC_CON1 are used
for all conversions.
In enhanced mode (bit MD = 1), the bitfields in register ADC_CTR2 are used for
standard conversions. Injected conversions use the bitfields in register ADC_CTR2IN.
Bitfield ADCTC (conversion time control) selects the basic conversion clock (f_BC), used
for the operation of the A/D converter. The sample time is derived from this conversion
clock and controlled by bitfield ADSTC. The sample time is always a multiple of 4 f_BC
periods. Table 16-4 lists the possible combinations.
Table 16-4 Improved Conversion and Sample Timing Control
ADCTC
A/D Converter
Basic Clock f_BC1)
ADSTC
Sample Time t_S
00’0000_B = 00_H f_ADC/1
00’0000_B = 00_H
t_BC × 8
00’0001_B = 01_H f_ADC/2
00’0001_B = 01_H
t_BC × 12
00’0010_B = 02_H f_ADC/3
00’0010_B = 02_H
t_BC × 16
…
f_ADC/(ADCTC + 1) …
t_BC × 4 × (ADSTC + 2)
11’1111_B = 3F_H f_ADC/64
11’1111_B = 3F_H
t_BC × 260
1) The limit values for f_BC (see data sheet) must not be exceeded when selecting ADCTC and f_ADC.
User’s Manual
ADC_X41, V2.1
16-19
V2.1, 2004-03