XC164-16 Datasheet, PDF (314/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
Interrupt Request Source
Global
CAN
Transmit
and
Receive
Logic
TXOK
RXOK
LEC
EWRN
BOFF
IMR4 Mask Register
IMC34 IMC33 IMC32
INTID Value
>^_ 1
>_1
INTD = 1
>^_ 1
MCA05477
Figure 21-7 INTID Mask for Global Interrupt Request Sources
Registers AIMR0/4 and BIMR0/4 contain a mask bit for each interrupt source
(AIMR0/BIMR0 for message specific interrupt sources and AIMR4/BIMR4 for the node
specific interrupt sources). If a mask bit is reset, the corresponding interrupt source is not
taken into account for the generation of the INTID value.
Message Control
Register for
Object n
INTPNDn
AIMR0
Mask Register
IMCn
AIR
Interrupt Pending
Register
INTID = n + 2
IMCn
BIMR0
Mask Register
INTID = n + 2
BIR
Interrupt Pending
Register
MCA05478
Figure 21-8 INTID Mask for Message Interrupt Request Sources
User’s Manual
TwinCAN_X41, V2.1
21-14
V2.1, 2004-03