XC164-16 Datasheet, PDF (299/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
High-Speed Synchronous Serial Interface (SSC)
20.2.8 Port Configuration Requirements
Table 20-3 shows the required register setting to configure the IO lines of the SSC
modules for master or slave mode operation.
Table 20-3 SSC0/SSC1 IO Selection and Setup
Module Mode Port Lines
Alternate Select
Register
Direction and IO
Port Output
Register
SSC0 Master P3.8 / MRST0 ALTSEL0P3.P8 = 1 DP3.P8 = 0 Input
P3.9 / MTSR0 ALTSEL0P3.P9 = 1 DP3.P9 = 1
Output
and P3.P9 = 1
P3.13 / SCLK0 ALTSEL0P3.P13 = 1 DP3.P13 = 1 Output
and P3.P13 = 1
Slave P3.8 / MRST0 ALTSEL0P3.P8 = 1 DP3.P8 = 1
Output
and P3.P8 = 1
P3.9 / MTSR0 ALTSEL0P3.P9 = 1 DP3.P9 = 0
Input
P3.13 / SCLK0 ALTSEL0P3.P13 = 1 DP3.P13 = 0 Input
SSC1 Master P1H.1 / MRST1 ALTSEL0P1H.P1 = 1 DP1H.P1 = 0 Input
P1H.2 / MTSR1 ALTSEL0P1H.P2 = 1 DP1H.P2 = 1 Output
P1H.3 / SCLK1 ALTSEL0P1H.P3 = 1 DP1H.P3 = 1 Output
Slave P1H.1 / MRST1 ALTSEL0P1H.P1 = 1 DP1H.P1 = 1 Output
P1H.2 / MTSR1 ALTSEL0P1H.P2 = 1 DP1H.P2 = 0 Input
P1H.3 / SCLK1 ALTSEL0P1H.P3 = 1 DP1H.P3 = 0 Input
Note: The direction control bits in registers DP3 or DP1H must be set or cleared by
software depending on the mode of operation selected (master or slave mode).
They are not controlled automatically by the SSC modules.
User’s Manual
SSC_X, V2.0
20-17
V2.1, 2004-03