XC164-16 Datasheet, PDF (304/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

21.1.2 TwinCAN Control Shell
XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
21.1.2.1 Initialization Processing
After an external hardware reset or while it is bus-off, the respective CAN controller node
is logically disconnected from the associated CAN bus and does not participate in any
message transfer. This is indicated by the ACR/BCR control register bit INIT = ‘1’, which
is automatically set in case of a reset or while the CAN node is bus-off. Furthermore, the
CAN node will be disconnected by setting bit INIT to ‘1’ via software. While INIT is active,
all message transfers between the affected CAN node controller and its associated CAN
bus are stopped and the bus output pin (TXDC) is held on ‘1’ level (recessive state).
After an external hardware reset, all control and message object registers are reset to
their associated reset values. During the bus-off-state or after a write access to register
ACR/BCR with INIT = ‘1’, all respective control and message object registers hold their
current values (except the error counters).
Resetting bit INIT to ‘0’ without being in the bus-off-state starts the synchronization
sequence (= connection to the CAN bus), which has to monitor at least one bus-idle
event (11 consecutive ‘recessive’ bits) on the associated CAN bus before the node is
allowed to take part in CAN traffic again.
During the bus-off recovery sequence:
• The receive and the transmit error counter within the error handling logic are reset.
• 128 bus-idle events (11 consecutive ‘recessive’ bits) have to be detected, before the
synchronization sequence can be initiated. The monitoring of the bus idle events is
immediately started by hardware after entering the bus-off state. The number of
already detected bus-idle events is counted and indicated by the receive error
counter.
• The reconnect procedure tests bit INIT by hardware after 128 bus-idle events. If INIT
is still set, the affected CAN node controller waits until INIT is cleared and at least one
bus-idle event is detected on the CAN bus, before the node takes part in CAN traffic
again. If INIT has been already cleared, the message transfer between the affected
CAN node controller and its associated CAN bus is immediately enabled.
User’s Manual
TwinCAN_X41, V2.1
21-4
V2.1, 2004-03