XC164-16 Datasheet, PDF (148/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Unit 6 (CAPCOM6)
18.1
Timer T12 Block
The timer T12 block is the main unit to generate the 3-phase PWM. A 16-bit counter is
connected to 3 channel registers via comparators, which generate a signal when the
counter contents match one of the channel register contents. A variety of control
functions facilitate the adaptation of the T12 structure to different application needs.
Besides the 3-phase PWM generation, the T12 block offers options for individual
compare and capture functions, as well as dead-time control and hysteresis-like
compare mode.
Timer T12
Logic
Ext.
Inputs
Capture/Compare
Channel 60
Capture/Compare
Channel 61
Capture/Compare
Channel 62
State Bits
CC60ST
CC61ST
CC62ST
Input and Control/Status Logic
To Dead-Time
Control
and Output
Modulation
MCA05507
Figure 18-3 Overview Diagram of the Timer T12 Block
Figure 18-4 shows a detailed block diagram of Timer T12. It receives its input clock, f_T12,
from the module clock f_CC6 via a programmable prescaler and an optional 1/256 divider.
These options are controlled via bitfields T12CLK and T12PRE (see Table 18-1). T12
can count up or down, depending on the selected operation mode. A direction flag,
CDIR, indicates the current counting direction.
Via a comparator, T12 is connected to a Period Register, T12PR. This register
determines the maximum count value for T12. In Edge-Aligned mode, T12 is reset to
0000_H after it has reached the period value. In Center-Aligned mode, the count direction
of T12 is set from ‘up’ to ‘down’ after it has reached the period value (please note that in
this mode, T12 exceeds the period value by one before counting down). In both cases,
signal T12_PM (T12 Period Match) is generated. The Period Register receives a new
period value from its Shadow Period Register, T12PS, which is loaded via software. The
transfer of a new period value from the shadow register into T12PR (see Section 18.8)
is controlled via the ‘T12 Shadow Transfer’ control signal, T12_ST. The generation of
this signal depends on the operating mode and on control bit STE12. Providing a shadow
register for the period value as well as for other values related to the generation of the
PWM signal facilitates a concurrent update by software for all relevant parameters.
User’s Manual
CAPCOM6_X, V2.0
18-4
V2.1, 2004-03