XC164-16 Datasheet, PDF (216/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Unit 6 (CAPCOM6)
SW Request Reset
Int.
Flag
Set
SW Request Set
>^_ 1
HW Interrupt
&
Event a
Interrupt
Enable
HW Interrupt
Event b
Interrupt
>^_ 1
Enable
&
SW Request Set
Set
SW Request Reset
Int.
Flag
INPx
>^_1
6
I0
>^_1
>^_ 1
6
I1
>^_1
6
I2
>^_1
6
I3
From Other
Interrupt Sources
MCA05549
Figure 18-45 Interrupt Structure Detail
Interrupt Registers
Register IS contains the individual interrupt request and status bits. This register can
only be read, write actions have no impact on the contents of this register. Software can
set or reset the bits individually by writing to register ISS (to set the bits) or to register
ISR (to reset the bits).
CCU6_IS
Interrupt Status Register
XSFR (E8D0_H/--)
Reset Value: 0000_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-
IDLE WHE CHE
TRP
S
TRP
F
T13
PM
T13
CM
T12
PM
T12
OM
ICC
62F
ICC
62R
ICC
61F
ICC
61R
ICC
60F
ICC
60R
- rh rh rh rh rh rh rh rh rh rh rh rh rh rh rh
Field
IDLE
Bits Type Description
14
rh
IDLE State Flag
If enabled (ENIDLE = 1), this bit is set together with
bit WHE (Wrong Hall Event). It has to be reset by SW.
0 No action
1 Bitfield MCMP is cleared, the selected outputs
are set to passive state
User’s Manual
CAPCOM6_X, V2.0
18-72
V2.1, 2004-03