XC164-16 Datasheet, PDF (367/417 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC164-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
Register MSGAMRn contains the mask bits for the acceptance filtering of message
object n.
MSGAMRHn (n = 31-0)
Message Object n Arbitration Mask Register High
MSGAMRLn (n = 31-0)
Message Object n Arbitration Mask Register Low
15 14 13 12 11 10 9 8 7 6 5
1
AM[28:16]
r
rw
15 14 13 12 11 10 9 8 7 6 5
AM[15:0]
rw
Reset Value: FFFF_H
Reset Value: FFFF_H
43210
43210
Field
AM[15:0]
AM[28:16]
1
Bits Type Description
[15:0] rw
Low
[12:0]
High
Message Acceptance Mask
Mask to filter incoming messages with standard
identifiers (AM[28:18]) or extended identifiers
(AM[28:0]). For standard identifiers bits AM[17:0] are
“don’t care”.
0 Identifier bit is ignored for acceptance test.
1 Identifier bit is taken into account for the
acceptance filtering.
[15:13] r
High
Reserved; returns ‘1’ if read; should be written with ‘1’.
User’s Manual
TwinCAN_X41, V2.1
21-67
V2.1, 2004-03