EP1SGX10DF672C6 Datasheet, PDF (4/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet

Features
● Pattern detector and word aligner supports programmable
patterns
● 8B/10B encoder/decoder performs 8- to 10-bit encoding and 10-
to 8-bit decoding
● Rate matcher compliant with IEEE 802.3-2002 for GigE mode
and with IEEE 802-3ae for XAUI mode
● Channel bonding compliant with IEEE 802.3ae (for XAUI mode
only)
● Device can bypass some transceiver block features if necessary
■ FPGA features are as follows:
● 10,570 to 41,250 logic elements (LEs); see Table 1–1
● Up to 3,423,744 RAM bits (427,968 bytes) available without
reducing logic resources
● TriMatrix^™ memory consisting of three RAM block sizes to
implement true dual-port memory and first-in-out (FIFO)
buffers
● Up to 16 global clock networks with up to 22 regional clock
networks per device region
● High-speed DSP blocks provide dedicated implementation of
multipliers (faster than 300 MHz), multiply-accumulate
functions, and finite impulse response (FIR) filters
● Up to eight general usage phase-locked loops (four enhanced
PLLs and four fast PLLs) per device provide spread spectrum,
programmable bandwidth, clock switchover, real-time PLL
reconfiguration, and advanced multiplication and phase
shifting
● Support for numerous single-ended and differential I/O
standards
● High-speed source-synchronous differential I/O support on up
to 45 channels for 1-Gbps performance
● Support for source-synchronous bus standards, including
10-Gigabit Ethernet XSBI, Parallel RapidIO, UTOPIA IV,
Network Packet Streaming Interface (NPSI), HyperTransport^TM
technology, SPI-4 Phase 2 (POS-PHY Level 4), and SFI-4
● Support for high-speed external memory, including zero bus
turnaround (ZBT) SRAM, quad data rate (QDR and QDRII)
SRAM, double data rate (DDR) SDRAM, DDR fast cycle RAM
(FCRAM), and single data rate (SDR) SDRAM
● Support for multiple intellectual property megafunctions from
Altera^® MegaCore^® functions and Altera Megafunction Partners
Program (AMPP^SM) megafunctions
● Support for remote configuration updates
● Dynamic phase alignment on LVDS receiver channels
1–2
Stratix GX Device Handbook, Volume 1
Altera Corporation
February 2005