EP1SGX10DF672C6 Datasheet, PDF (224/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet

Power Consumption
Table 6–32. CTT I/O Specifications (Part 2 of 2)
Symbol
V_OH
V_OL
I_O
Parameter
High-level output voltage
Low-level output voltage
Output leakage current
(when output is high Z)
Conditions
I_OH = –8 mA
I_OL = 8 mA
GND ≤V_{O U T} ≤
V_{C C I O}
Minimum
V_{R E F} + 0.4
–10
Typical Maximum
V_{R E F} – 0.4
10
Units
V
V
μA
Table 6–33. Bus Hold Parameters
Parameter Conditions
1.5 V
V_{C C I O} Level
1.8 V
2.5 V
3.3 V
Units
Min Max Min Max Min Max Min Max
Low sustaining V_IN > V_IL
25
30
50
70
μA
current
(maximum)
High sustaining V_IN < V_IH
–25
–30
–50
–70
μA
current
(minimum)
Low overdrive 0 V < V_IN <
160
200
300
500 μA
current
V_CCIO
High overdrive 0 V < V_IN <
current
V_CCIO
–160
–200
–300
–500 μA
Bus-hold trip
point
0.5
1.0 0.68 1.07 0.7
1.7
0.8
2.0
V
Notes to Tables 6–14 through 6–33:
(1) Drive strength is programmable according to values in the Stratix GX Architecture chapter of the Stratix GX Device
Handbook, Volume 1.
(2) V_{R E F} specifies the center point of the switching range.
Power
Consumption
Detailed power consumption information for Stratix GX devices will be
released when available.
Timing Model
The DirectDrive^™ technology and MultiTrack^™ interconnect ensure
predictable performance, accurate simulation, and accurate timing
analysis across all Stratix GX device densities and speed grades. This
section describes and specifies the performance, internal, external, and
PLL timing specifications.
All specifications are representative of worst-case supply voltage and
junction temperature conditions.
6–22
Stratix GX Device Handbook, Volume 1
Altera Corporation
June 2006