EP1SGX10DF672C6 Datasheet, PDF (209/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet

DC & Switching Characteristics
Table 6–7. Stratix GX Transceiver Block AC Specification (Part 4 of 7)
Symbol /
Description
Conditions
-5 Commercial
Speed Grade (1)
-6 Commercial &
Industrial Speed
Grade
(1)
-7 Commercial &
Industrial Speed
Grade
Unit
(1)
Min Typ Max Min Typ Max Min Typ Max
Sinusoidal
jitter
f = 22.1 kHz at
3.125 Gbps
f = 1.875 MHz at
3.125 Gbps
f = 20 MHz at
3.125 Gbps
BER (12)
Receive
Single width
7
latency (4)
Double width
5
Channel to
channel bit
skew
tolerance (5),
(6)
XAUI mode /
inter-quadrant
only
Run-length (8)
Receive
return loss
(differential)
100 MHz to
2.5 Ghz
Receive
return loss
(common
mode)
100 MHz to
2.5 Ghz
8.5
0.1
0.1
10^-12
32
7
19
5
40
80
–10
–6
8.5
0.1
0.1
10^-12
32
7
19
5
40
N/A
N/A
N/A
10^-12
32
19
N/A
(3)
(3)
UI (7)
80
80
UI
–10
–10 dB
–6
–6
dB
Transmitter
Serial data Commercial /
500
rate
industrial
Parallel
20
transceiver/
core
interface
speed
3,187.5 500
398.4 20
3,187.5 500
375 20
2,500 Mbps
312.5 MHz
8B/10B Custom Transmitter Jitter using Encoded CRPAT Note (9)
Deterministic 500 Mbps
0.11
jitter
Pre-emphasis = 1
Total jitter
V_OD = 1,400 mV
0.18
0.11
0.11 UI
0.18
0.18 UI
Altera Corporation
June 2006
6–7
Stratix GX Device Handbook, Volume 1