EP1SGX10DF672C6 Datasheet, PDF (123/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet

Figure 4–33. Adder/Output Blocks Note (1)
accum_sload0 (2)
Result A
Accumulator Feedback
Stratix GX Architecture
addnsub1 (2)
Result B
signa (2)
signb (2)
Result C
addnsub3 (2)
Adder/
Subtractor/
Accumulator1
Summation
Adder/
Subtractor/
Accumulator2
overflow0
Output Selection
Multiplexer
Output
Register Block
overflow1
Result D
accum_sload1 (2)
Accumulator Feedback
Notes to Figure 4–33:
(1) Adder/output block shown in Figure 4–33 is in 18 × 18-bit mode. In 9 × 9-bit mode, there are four adder/subtractor
blocks and two summation blocks.
(2) These signals are either not registered, registered once, or registered twice to match the data path pipeline.
Altera Corporation
February 2005
4–57
Stratix GX Device Handbook, Volume 1