EP1SGX10DF672C6 Datasheet, PDF (242/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet

Timing Model
Table 6–59. EP1SGX10 Row Pin Global Clock External I/O Timing Parameters (Part 2 of 2)
Symbol
t_OUTCO
t_INSUPLL
t_INHPLL
t_OUTCOPLL
-5 Speed Grade
Min
Max
-6 Speed Grade
Min
Max
-7 Speed Grade
Unit
Min
Max
2.000
5.231
2.000
5.293
2.000
5.822
ns
1.126
1.186
1.352
ns
0.000
0.000
0.000
ns
0.500
2.804
0.500
2.627
0.500
2.765
ns
Tables 6–60 through 6–65 show the external timing parameters on column
and row pins for EP1SGX25 devices.
Table 6–60. EP1SGX25 Column Pin Fast Regional Clock External I/O Timing Parameters
Symbol
t_INSU
t_INH
t_OUTCO
-5 Speed Grade
Min
Max
-6 Speed Grade
Min
Max
-7 Speed Grade
Unit
Min
Max
2.418
2.618
3.014
ns
0.000
0.000
0.000
ns
2.000
4.524
2.000
4.834
2.000
5.538
ns
Table 6–61. EP1SGX25 Column Pin Regional Clock External I/O Timing Parameters
Symbol
t_INSU
t_INH
t_OUTCO
t_INSUPLL
t_INHPLL
t_OUTCOPLL
-5 Speed Grade
Min
Max
-6 Speed Grade
Min
Max
-7 Speed Grade
Unit
Min
Max
1.713
1.838
2.069
ns
0.000
0.000
0.000
ns
2.000
5.229
2.000
5.614
2.000
6.432
ns
1.061
1.155
1.284
ns
0.000
0.000
0.000
ns
0.500
2.661
0.500
2.799
0.500
3.195
ns
6–40
Stratix GX Device Handbook, Volume 1
Altera Corporation
June 2006