|
EP1SGX10DF672C6 Datasheet, PDF (38/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet | |||
|
◁ |
Figure 2â23. Data Path in Reverse Serial Loopback Mode
Deserializer
Word
Aligner
Clock
Recovery
Unit
BIST PRBS
Verifier
Channel
Aligner
Rate
Matcher
8B/10B
Decoder
Byte
Deserializer
BIST
Incremental
Verifier
Phase
Compensation
FIFO
Serializer
Active Path
Non-Active Path
8B/10B
Encoder
BIST PRBS
Generator
Byte
Serializer
Phase
Compensation
FIFO
BIST
Generator
BIST (Built-In Self Test)
The Stratix GX transceiver has built-in self test modes to aid in debug and
testing. The BIST modes are set in the Stratix GX MegaWizard Plug-In
Manager in the Quartus II software. Only one BIST mode can be set for
any single instance of the transceiver block. The BIST mode applies to all
channels used in a transceiver.
The following is a list of the available BIST modes:
â PRBS generator and verifier
â Incremental mode generator and verifier
â High-frequency generator
â Low-frequency generator
â Mixed-frequency generator
Figures 2â24 and 2â25 are diagrams of the BIST PRBS data path and the
BIST incremental data path, respectively.
2â28
Stratix GX Device Handbook, Volume 1
Altera Corporation
June 2006
|
▷ |