EP1SGX10DF672C6 Datasheet, PDF (118/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet

Digital Signal Processing Block
The DSP block consists of the following elements:
■ Multiplier block
■ Adder/output block
Multiplier Block
The DSP block multiplier block consists of the input registers, a
multiplier, and pipeline register for pipelining multiply-accumulate and
multiply-add/subtract functions as shown in Figure 4–31.
Figure 4–31. Multiplier Sub-Block Within Stratix GX DSP Block
sign_a (1)
sign_b (1)
aclr[3..0]
clock[3..0]
ena[3..0]
shiftin B shiftin A
Data A
Data B
DQ
ENA
CLRN
DQ
ENA
CLRN
DQ
ENA
CLRN
Result
to Adder
blocks
Optional
Multiply-Accumulate
and Multiply-Add
Pipeline
shiftout B shiftout A
Note to Figure 4–31:
(1) These signals can be unregistered or registered once to match data path pipelines if required.
4–52
Stratix GX Device Handbook, Volume 1
Altera Corporation
February 2005