EP1SGX10DF672C6 Datasheet, PDF (234/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet

Timing Model
Table 6–45. IOE Internal Timing Microparameters
Symbol
t_SU
t_H
t_CO
t_{PIN2COMBOUT_R}
t_{PIN2COMBOUT_C}
t_{COMBIN2PIN_R}
t_{COMBIN2PIN_C}
t_CLR
t_PRE
t_CLKHL
-5 Speed Grade -6 Speed Grade -7 Speed Grade
Unit
Min Max Min Max Min Max
64
68
68
ps
76
80
80
ps
162
171
171 ps
1,038
1,093
1,256 ps
927
976
1,122 ps
2,944
3,099
3,563 ps
3,189
3,357
3,860 ps
262
276
317
ps
262
276
317
ps
90
95
109
ps
Table 6–46. DSP Block Internal Timing Microparameters
Symbol
t_SU
t_H
t_CO
t_INREG2PIPE18
t_INREG2PIPE9
t_{PIPE2OUTREG2ADD}
t_{PIPE2OUTREG4ADD}
t_PD9
t_PD18
t_PD36
t_CLR
t_CLKHL
-5 Speed
Grade
-6 Speed
Grade
-7 Speed
Grade
Unit
Min Max Min Max Min Max
0
0
0
ps
67
75
86
ps
142
158
181 ps
2,613
2,982
3,429 ps
3,390
3,993
4,591 ps
2,002
2,203
2,533 ps
2,899
3,189
3,667 ps
3,709
4,081
4,692 ps
4,795
5,275
6,065 ps
7,495
8,245
9,481 ps
450
500
575
ps
1,350
1,500
1,724
ps
6–32
Stratix GX Device Handbook, Volume 1
Altera Corporation
June 2006