EP1SGX10DF672C6 Datasheet, PDF (163/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet

Figure 4–58. Stratix GX IOE Structure
Logic Array
OE
OE Register
DQ
Stratix GX Architecture
OE Register
DQ
Output A
Output Register
DQ
CLK
Output Register
Output B
DQ
Input A
Input B
Input Register
DQ
Input Register
DQ
Input Latch
DQ
ENA
The IOEs are located in I/O blocks around the periphery of the Stratix GX
device. There are up to four IOEs per row I/O block and six IOEs per
column I/O block. The row I/O blocks drive row, column, or direct link
interconnects. The column I/O blocks drive column interconnects.
Figure 4–59 shows how a row I/O block connects to the logic array.
Figure 4–60 shows how a column I/O block connects to the logic array.
Altera Corporation
February 2005
4–97
Stratix GX Device Handbook, Volume 1