EP1SGX10DF672C6 Datasheet, PDF (271/272 Pages) Altera Corporation – Section I. Stratix GX Device Family Data Sheet

7. Reference & Ordering
Information
SGX51007-1.0
Software
Stratix^® GX devices are supported by the Altera^® Quartus^® II design
software, which provides a comprehensive environment for system-on-a-
programmable-chip (SOPC) design. The Quartus II software includes
hardware description language and schematic design entry, compilation
and logic synthesis, full simulation and advanced timing analysis,
SignalTap^® logic analysis, and device configuration. See the Design
Software Selector Guide for more details on the Quartus II software
features.
The Quartus II software supports the Windows 2000/NT/98, Sun Solaris,
Linux Red Hat v6.2 and HP-UX operating systems. It also supports
seamless integration with industry-leading EDA tools through the
NativeLink^® interface.
Device Pin-Outs Device pin-outs for Stratix GX devices will be released on the Altera web
site (www.altera.com).
Ordering
Information
Figure 7–1 describes the ordering codes for Stratix GX devices.
Figure 7–1. Stratix GX Device Packaging Ordering Information
Family Signature
EP1SGX: Stratix GX
Device Type
10
25
40
Number of
Transceiver
Channels
C: 4
D: 8
F: 16
G: 20
Package Type
F: FineLine BGA
EP1SGX 40 G
F 1020 C
7
N
Optional Suffix
Indicates specific device options or
shipment method.
N: Lead free
ES: Engineering sample
Speed Grade
5, 6, or 7, with 5 being the fastest
Operating Temperature
C: Commercial temperature (t_j = 0˚ C to 85˚ C )
I: Industrial temperature (t_j = -40˚ C to 100˚ C )
Pin Count
Number of pins for a particular FineLine BGA package
Altera Corporation
7–1
February 2005