PD17012_15 Datasheet, PDF (98/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
10.6.8 Status of output ports (P2E to P2H and PYA) on reset
(1) On power-on reset
P0E and P0F are set as LCD segment signal output pins and output a low level.
Because the contents of the output latch are undefined, undefined data is output if these ports are set in the
output mode as is. Initialize the ports in the program as necessary.
(2) On CE reset
P0E and P0F are set as LCD segment signal output pins and output a low level.
Because the contents of the output latch are retained, the previous values are retained if these ports are set
in the output mode as is.
(3) On execution of clock stop instruction
P0E and P0F are set as LCD segment signal output pins and output a low level.
Because the contents of the output latch are retained, the previous values are retained if these ports are set
in the output mode as is.
(4) In halt status
The contents of the output latch are output.
Because the contents of the output latch are retained, the output data is not changed in the halt status.
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Data Sheet U10101EJ4V0DS