PD17012_15 Datasheet, PDF (204/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
Figure 17-7. Configuration of IF Counter Gate Judge Register
Name
Flag symbol
b3 b2 b1 b0
IF counter gate judge register 0 0 0 I
F
C
G
Address
04H
Read/write
R
Detects opening/closing of gate of frequency counter
When IF counter function is selected
When external gate counter
function is selected
0 Sets IFCSTRT flag to 1 and is set to
1 until gate is closed
1
Sets IFCSTRT flag to 1 and is set to
1 while gate is open, regardless of
input of P0B2/FCG0 and P0B3/FCG1
pins
Fixed to 0
Power-on
Clock stop
CE
0000
0
R
Cautions 1.
2.
Do not read the contents of the IF counter data register (IFC) to the data buffer while the IFCG
flag is set to 1.
The gate of the external gate counter cannot be opened or closed by the IFCG flag. Use the
IFCSTRT flag to open or close the gate.
Remark R: Retained
202
Data Sheet U10101EJ4V0DS