PD17012_15 Datasheet, PDF (179/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
15.8 Outline of Serial Interface Operation
Table 15-3 shows an outline of the serial interface operation in each mode.
Table 15-3. Outline of Serial Interface Operation in Each Mode
Item
Operation
Mode
3-Wire Serial I/O Mode
Slave Operation
SIO1CK1 = SIO1CK0 = 0
Master Operation
SIO1CK1 = SIO1CK0 = other than 0
P0A2/SCK1
Wait
Wait released
Wait
Wait released
Setting
status of
each pin
When P0ABIO2 = 0
Floating
General-purpose
input port
When P0ABIO2 = 1
General-purpose
output port
Outputs contents of
output latch
P0A1/SO1 When SIO1HIZ = 0
When P0ABIO1 = 0
General-purpose
input port
Floating
When P0ABIO1 = 1
General-purpose
output port
Outputs contents of
output latch
Regardless of
P0ABIO2
Floating
Wait external clock
input
When SIO1HIZ = 1
When P0ABIO1 = 0
General-purpose
input port
Floating
When P0ABIO1 = 1
Outputs serial data
When P0ABIO2 = 0
Floating
General-purpose
input port
When P0ABIO2 = 1
General-purpose
output port
Outputs contents of
output latch
When SIO1HIZ = 0
When P0ABIO1 = 0
General-purpose
input port
Floating
When P0ABIO1 = 1
General-purpose
output port
Outputs contents of
output latch
Regardless of
P0ABIO2
Outputs internal clock
When SIO1HIZ = 1
When P0ABIO1 = 0
General-purpose
input port
Floating
When P0ABIO1 = 1
Outputs serial data
P0A0/SI1
When P0ABIO0 = 0
Floating
Waits for external data
When P0ABIO0 = 1
General-purpose output port.
Outputs contents of output latch
Operation of clock
counter
Incremented at falling edge of SCK1 pin
Operation of
presettable shift
register (SIO1SFR)
Output
When SIO1HIZ = 1
Shifts data from MSB and outputs it to SO1 pin at falling edge of SCK1 pin
When SIO1HIZ = 0
Does not output data
Input
Shifts data of SI1 pin from LSB and inputs it at rising edge of SCK1 pin regardless of P0ABIO0
However, the contents of output latch are output to SI1 pin when P0ABIO0 = 1
Wait operation
Serial communication is started when 1 is written to SIO1TS.
SIO1TS is reset to 0 at rising edge of shift clock when value of clock counter is 8.
For the operation of each pin, refer to above.
Data Sheet U10101EJ4V0DS
177