PD17012_15 Datasheet, PDF (44/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
5.3.2 Function of address register
The address register specifies a program memory address when a table reference (“MOVT DBF, @AR”),
stack manipulation (“PUSH AR”, “POP AR”), indirect branch (“BR @AR”) or indirect subroutine call (“CALL
@AR”) instruction is executed.
A dedicated instruction (“INC AR”) that can increment the value of the address register by one is also
available.
The following paragraphs (1) through (5) explain the operations to be performed when the respective
instructions are executed.
(1) Table reference instruction (“MOVT DBF, @AR”)
This instruction reads the constant data (16-bit) of the program memory address specified by the contents
of the address register to the data buffer.
The addresses for storing constant data specified by the address register are 0000H to 0FFFH.
(2) Stack manipulation instructions (“PUSH AR”, “POP AR”)
When the “PUSH AR” instruction is executed, the value of the stack pointer is decremented by one, and
the contents of the address register (AR) are stored to the address stack register specified by the value
of the decremented stack pointer.
When the “POP AR” instruction is executed, the contents of the address stack register specified by the
stack pointer are transferred to the address register, and the value of the stack pointer is incremented
by one.
(3) Indirect branch instruction (“BR @AR”)
This instruction branches execution to the program memory address specified by the contents of the
address register.
The branch addresses specified by the address register are 0000H to 0FFFH.
(4) Indirect subroutine call instruction (“CALL @AR”)
This instruction calls the subroutine at the program memory address specified by the contents of the
address register.
The top address of the subroutine specified by the address register are 0000H to 0FFFH.
(5) Address register increment instruction (“INC AR”)
This instruction increments the contents of the address register by one.
Because the address register of the µPD17012 consists of 12 bits, its contents are cleared to 0000H if
the “INC AR” instruction is executed when the contents of the address register are 0FFFH.
5.3.3 Address register and data buffer
The address register can transfer data via the data buffer as part of the peripheral hardware.
For details, refer to 9. DATA BUFFER (DBF).
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Data Sheet U10101EJ4V0DS