PD17012_15 Datasheet, PDF (106/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
11.3.2 Interrupt stack register operation
Figure 11-8 illustrates the operation of the interrupt stack register.
If multiple interrupts exceeding 2 levels are acknowledged, the first saved contents are discarded and
therefore must be saved by program.
Figure 11-8. Operation of Interrupt Stack Register
(a) If interrupt does not exceed 2 levels
Undefined
Undefined
A
Undefined
Undefined
Undefined
VDD application Interrupt A RETI
(b) If interrupt exceeds 2 levels
A
B
C
B
B
Undefined
A
B
B
B
Interrupt A Interrupt B Interrupt C RETI
RETI
11.4 Stack Pointer, Address Stack Register, Program Counter
The address stack register saves the return address to which execution is to be returned from an interrupt
processing routine.
The stack pointer specifies the address of the address stack register.
When an interrupt is acknowledged, therefore, the value of the stack pointer is decremented by one and the
value of the program counter at that time is saved to the address stack register specified by the stack pointer.
When the dedicated return instruction RETI is executed after the processing of the interrupt servicing routine
has been executed, the contents of the address stack register specified by the stack pointer are restored to the
program counter, and the value of the stack pointer is incremented by one.
For further information, also refer to 3. ADDRESS STACK (ASK).
11.5 Interrupt Enable Flip-Flop (INTE)
The interrupt enable flip-flop enables all the interrupts.
When this flip-flop is set, all the interrupts are enabled. When it is reset, all the interrupts are disabled.
This flip-flop is set or reset by using dedicated instructions EI (to set) and DI (to reset).
The EI instruction sets this flip-flop when the instruction next to the EI instruction is executed, and the DI
instruction resets the flip-flop while the DI instruction is executed.
When an interrupt is acknowledged, this flip-flop is automatically reset.
Nothing is affected even if the DI instruction is executed in the DI state, or if the EI instruction is executed
in the EI state.
This flip-flop is reset on power-on reset, CE reset, and on execution of the clock stop instruction.
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Data Sheet U10101EJ4V0DS